Mega Pixel Digital Camera Development Package - FPGA Systems

Support Altera DE3/ DE2_70/ DE2/ DE1 and Cyclone II Starter boards

(Frame Grabber, high-performance multi-port SDRAM frame buffer, image processing IPs)

Provide users entire reference design

- Output data in RGB Bayer Pattern format

- Support 2,592H x 1,944V active pixels

Equipped with Micron 5 Mega Pixel CMOS sensor

Photographic Experts Group for viewing.

Software allows users to upload the picture captured into PC and save the picture into bitmap format or Joint

Support motion capture mode

Support exposure time controlling - users can adjust the exposure according to the light of the surrounding area

Complete reference design with source code in Verilog